Display

ABSTRACT

The display element(s) ( 14, 14   A   , 14   B   , 14   C   , 14   D   , 14   E   , 14   F   , 14′, 14″, 14′″, 14 ″″) have i) a substrate ( 12, 13 ), ii) an electrode ( 24, 24 ′) adjacent to, and disposed on at least a portion of the substrate ( 12, 13 ), iii) another electrode ( 26 ) distal to the substrate and opposed to the electrode ( 24, 24 ′), iv) a dielectric layer ( 16 ) established on the substrate ( 12, 13 ) and/or the electrode ( 24, 24 ′) or distal electrode ( 26 ), v) an electrically activatable medium including colorant particles ( 22 ) disposed between the electrode ( 24, 24 ′) and the distal electrode ( 26 ), vi) at least one reservoir ( 18 ) having an area that is less than an area of the display element(s) ( 14, 14   A   , 14   B   , 14   C   , 14   D   , 14   E   , 14   F   , 14′, 14″, 14′″, 14 ″″), and vii) a gate electrode ( 28, 28 ′) having at least a portion thereof disposed between the electrode ( 24, 24 ′) and the distal electrode ( 26 ). The display element(s) ( 14, 14   A   , 14   E   , 14   C   , 14   D   , 14   E   , 14   F   , 14′, 14″, 14′″, 14 ″″) form a visible image by in-plane motion of the colorant particle(s) ( 22 ) when electric potential is applied to the electrode ( 24, 24 ′), the distal electrode ( 26 ), and/or the gate electrode ( 28, 28 ′).

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is a continuation-in-part of co-pending U.S. application Ser. No. 12/411,828, filed Mar. 26, 2009, which is herein incorporated by reference in its entirety.

BACKGROUND

The present disclosure relates generally to displays.

Electronic paper (also referred to as e-paper) is a form of display technology often designed to produce visible images that have a similar appearance to printed paper. An electrophoretic display is one example of e-paper. An electrophoretic display generally uses electrophoresis to move charged particles in an electrophoretic medium under the influence of an external electric field. The charged particles may also be rearranged in response to changes in the applied electric field to produce visible images.

BRIEF DESCRIPTION OF THE DRAWINGS

Features and advantages of embodiments of the present disclosure will become apparent by reference to the following detailed description and drawings, in which like reference numerals correspond to the same or similar, though perhaps not identical, components. For the sake of brevity, reference numerals or features having a previously described function may or may not be described in connection with other drawings in which they appear.

FIG. 1A schematically depicts an embodiment of a display including a passively addressed matrix of display elements;

FIG. 1B schematically depicts an embodiment of a display including an actively addressed matrix of display elements;

FIGS. 2A through 2D are schematic, cross-sectional views taken along line 2-2 of FIGS. 1A and 1B depicting embodiments of a display element;

FIGS. 3A and 3B are schematic, cross-sectional views also taken along line 2-2 of FIGS. 1A and 1B depicting additional embodiments of a display element;

FIGS. 4A and 4B are top and cross-sectional views, respectively, of an embodiment of a display element including line structures;

FIGS. 5A and 5B are top and cross-sectional views, respectively, of an embodiment of a display element including dot structures;

FIGS. 6A through 6F schematically depict different stages of an addressing sequence of the embodiment of the display element shown in FIG. 2A;

FIGS. 7A through 7F together schematically depict an example of a method of making the embodiment of the display element shown in FIG. 2C;

FIGS. 8A through 8E together schematically depict another example of a method of making another embodiment of the display element as disclosed herein;

FIGS. 9A through 9E together schematically depict yet a further example of a method of making yet another embodiment of the display element as disclosed herein;

FIGS. 10A through 10F together schematically depict still another example of a method of making an alternate embodiment of the display element as disclosed herein; and

FIGS. 11A through 11F together schematically depict an example of a method of making still a further embodiment of the display element as disclosed herein.

DETAILED DESCRIPTION

Embodiment(s) of the display, as disclosed herein, generally include at least one display element, each constructed with i) at least two opposed electrodes, and ii) a gate electrode and at least one reservoir disposed between the opposed electrodes. The opposed electrodes, the gate electrode, and the reservoir(s) are arranged in a manner sufficient to enable in-plane motion of colorant particles present in an electrically activatable medium. Such in-plane motion generally occurs in response to a sufficient electric potential applied to the colorant particles by one or more of the electrodes. The display element(s) further include a three-level architectural arrangement of the opposed electrodes and the gate electrode, where such an arrangement advantageously i) enables the production of visible images having a range of optical states with different tone levels useful for controlling images in the gray scale, ii) enables relatively fast switching between such optical states, and iii) substantially eliminates crossing over of co-planar electrical lines in the display element, thereby substantially simplifying fabrication of the display.

Non-limiting examples of the display 10, 10′ are schematically shown in FIGS. 1A and 1B. The display 10, 10′ generally includes at least one display element 14 established on a surface 15 of a substrate 12. As shown in FIGS. 1A and 1B, the display 10, 10′ includes several display elements 14 arranged on the substrate 12 in a two-dimensional array, where the display elements 14 are disposed in straight lines to form a substantially square lattice. Other arrangements of the display elements 14 include, but are not limited to, arrangements in rectangular lattices, substantially triangular lattices, or stretched triangular lattices.

As also shown in FIGS. 1A and 1B, the display elements 14 are established on the substrate 12 in a single level on the substrate 12. The display elements 14 may, in another embodiment, be stacked in two or more levels on the substrate 12. Such configuration of the stacking is referred to herein as “multi-level stacking”. For instance, a multi-level stack including two layers of the display elements 14 may include a first series of the elements 14 established on one side of the substrate 12, and another series of elements 14 established on an opposing side of the substrate 12. Such multi-level stacking arrangements enable colored images to be produced by the display 10.

As also shown in FIGS. 1A and 1B, the display 10, 10′ may include several individual display elements 14 arranged on the substrate 12 in rows and in columns. In other embodiments, the display elements 14 may be provided as individual segments. In any event, each element 14 or segment of elements 14 is/are generally driven by at least two electrodes; an electrode placed along each select line SL and an electrode placed along each data line DL. It is to be understood that although the electrode placed along the select line SL and the electrode placed along the data line DL technically cross at each of the display elements 14, the display element 14 architecture (which will be described in detail below in conjunction with the FIG. 2 and the FIG. 3 series) electrically isolates one electrode from another. More specifically, each display element 14 includes a three-level, vertical stacking arrangement of the electrodes, where each electrode is still sufficiently isolated from an adjacent electrode.

The display 10, 10′ may also be configured to be driven via a number of different addressing schemes, such as, e.g., passive matrix addressing (shown in FIG. 1A) and active matrix addressing (shown in FIG. 1B). The display 10 depicted in FIG. 1A is an example of a display that uses passive addressing to form visible images. During passive addressing, selected rows of the display elements 14 (only one element 14 is shown in the figure at one intersection of a distal and gate electrode, but it is to be understood that a display element/pixel 14 is formed at each intersection of the distal and gate electrodes) are written with optical states determined by an electric potential different between select lines SL and data lines DL. Each display element 14 in non-selected rows generally maintains its state without active driving circuitry (e.g., transistors, etc.) until the row containing such display elements 14 is selected. The respective voltages are denoted in the figure as V_(select) and V_(unselect). Passive matrix addressing is often used in, but not limited to, liquid crystal displays, electronic papers, or the like.

The display 10′ shown in FIG. 1B is an example of a display that uses active addressing to form visible images. The display 10′ may be actively addressed by connecting each display element 14 to, e.g., a transistor “t” or other switching device and actively maintaining a state of one display element 14, while one or more other element(s) 14 is/are being addressed. The respective voltages are denoted in the figure as V_(select), V_(unselect), and V₁, V₂ and V₃. Active matrix addressing typically enables relatively fast display refresh times, as compared to passively addressed displays, since the refresh time depends, at least in part, on the speed of the transistor “t” rather than on the speed of an optical effect. Active addressing is often used in, but not limited to, video displays.

Another example of a display (not shown in the FIG. 1 series) may include one that is directly addressed. In direct addressing, each display element is individually driven by its own data line.

Embodiments of the display element 14 are schematically depicted in the FIGS. 2 and 3 series. The display elements 14 are identified by reference numerals 14 _(A), 14 _(B), 14 _(C), and 14 _(D) in the FIG. 2 series, and by reference numerals 14 _(E) and 14 _(F) in the FIG. 3 series. In each of the embodiments shown in the FIGS. 2 and 3 series, the display element 14 includes at least the substrate 12, a dielectric layer 16, and a three-level stacking arrangement of three electrodes; an electrode 24, a distal electrode 26, and a gate electrode 28. The embodiments shown in the FIG. 2 series include different constructions of one or more gate electrodes 28, 28′, where at least a portion of such electrodes 28, 28′ are disposed in the dielectric layer 16. It is to be understood that the embodiments shown in the FIG. 3 series differ from those depicted in the FIG. 2 series. For example, the gate electrodes 28 are depicted in the FIG. 2 series as being disposed in the dielectric layer 16, whereas the gate electrodes 28 are depicted in the FIG. 3 series as being disposed on the dielectric layer 16. In another embodiment, the gate electrode 28 can be continuous with the exception of the reservoir 18 areas. Furthermore, the electrode 24 is constructed differently in the embodiments shown in the FIG. 2 series than the electrode 24′ depicted in the FIG. 3 series.

In an embodiment, the display element 14 generally includes at least the substrate 12. In another embodiment, the display elements 14 include two opposing substrates 12, 13 (shown by the embodiments depicted in the FIG. 2 series and in FIG. 3). The substrates 12, 13 may be selected from insulating materials, conducting materials, or semi-conducting materials. In an embodiment, the substrates 12, 13 are selected from an insulating material, non-limiting examples of which include glass, various polymers, and/or the combinations thereof. If a polymer is used, non-limiting examples of suitable polymers include polycarbonates (PC), polyarylates (PAR), polyimides (PI), polyethyleneterephthalate (PET), polyethylenenapthalate (PEN), polyestersulfone (PES), polyolefins, and/or combinations thereof.

The substrate 12 and/or the substrate 13 may also be selected from a material that is transparent, or from a material that is opaque. Such a selection may depend, at least in part, on how the visible image is produced. For example, if the display 10 uses reflectivity to form visible images, and the display 10 does not require light to pass through one or more of the substrates 12, 13, the substrate(s) 12, 13 may be selected from an opaque material. In some instances, the display 10 may also be used on top of or over another display or another image. In such instances, the substrate(s) 12, 13 may be selected from transparent materials.

In an embodiment, the substrate 12 may be formed from a conducting or a semiconducting material. In this embodiment, the display element 14 may be configured so that the substrate 12 functions as an electrode, such as the electrode 24′ (described in detail below). In such a configuration, the display element 14 does not include a separate electrode 24′. Non-limiting examples of suitable conducting materials for the substrate 12 include stainless steel, metallic foils, and/or the like. A non-limiting example of a suitable semiconducting material for the substrate 12 includes a silicon wafer.

Referring now to the FIG. 2 series, the display element 14 further includes a dielectric layer 16 established on the substrate 12. In an example, the dielectric layer 16 is selected from an optically transparent material, non-limiting examples of which include thermally and UV-curable, embossable resins, photoresists, and/or combinations thereof.

In an embodiment, the dielectric layer 16 includes at least one reservoir 18 defined therein. In some instances, the dielectric layer 16 includes a single reservoir 18 in each display element 14. Such a configuration may be useful, for example, for display elements that produce a single color. In other instances, more than one reservoir 18 may be defined in the dielectric layer 16 for each display element 14. Such configurations are schematically depicted in FIGS. 4A, 4B, 5A, and 5B. Additional reservoirs may be desirable, for example, to optimize the optical contrast of the images, increase a switching speed of the display 10 and/or to enable use of more than one type of colorant particle within each display element 14. The additional reservoirs 18 may, in an example, be formed in a periodic lattice arrangement (such as shown in FIGS. 4A and 4B) or in an aperiodic stochastic arrangement (such as shown in FIGS. 5A and 5B). Periodic lattice arrangements typically have relatively uniform reservoir spacing, which tends to optimize switching uniformity. Aperiodic lattice arrangements, on the other hand, have random reservoir spacing, which tends to avoid interference patterns that may occur due, at least in part, to overlapping periodic lattices.

Furthermore, the reservoirs 18 may include line structures (as also shown, e.g., in FIGS. 4A and 4B), dot structures (as also shown, e.g., in FIGS. 5A and 5B), two-dimensional areas, three-dimensional shapes, fractal shapes, or combinations thereof. FIGS. 4A and 4B illustrate a top view and a cross-sectional view of one embodiment of a line structure for a display 10. The embodiment of FIGS. 4A and 4B employs a periodic distribution of the lines. The lines are formed by patterning line reservoirs 18 into a dielectric layer 16 formed on the electrode 24 that is formed on the substrate 12. As in other embodiments, the line reservoirs 18 can be patterned into the dielectric layer 16 using embossing, photolithography, or some other means for forming the reservoirs 18 through the dielectric layer 16. A distal electrode 26 is formed over the viewing area VA.

The display element 14 of FIGS. 5A and 5B illustrates an aperiodic distribution of dots. Each dot is a reservoir 18 patterned into the dielectric layer 16 to connect the viewing area VA of the display element 14 to the electrode 24′. In the illustrated embodiment, the electrode 24 is a blanket electrode formed on the substrate 12. The distal electrode 26 is formed over the viewing area VA.

The reservoirs 18 have been shown as either circles or lines. However, it is to be understood that the present embodiments are not to be limited in either shape or size of the reservoirs 18, as long as they satisfy the aperture, optical contrast and other operating requirements of the display element 14. They can be formed in circles, triangles, squares, rectangles, diamonds, stars, cones, inverse pyramids, or any other shape. Similarly, there is no requirement that all of the reservoirs 18 be the same size. As alluded to above, the reservoirs 18 can be sized such that size varies in either a periodic or an aperiodic stochastic fashion. The reservoirs 18 can also be randomly sized in a single segment or pixel. The dielectric layer 16 can be patterned with multiple dimensional shapes or fractal shapes. This patterning includes patterning the dielectric layer 16 to block some dots that are desired to be inactive.

Dot structures that are small compared to the area of the display element 14 can be considered zero dimensional shapes. Line structures that have one dimension substantially larger than the other can be considered one dimensional shapes. Reservoirs 18 with a cross-sectional area that is significant compared to the area of the display element 14 can be considered two dimensional areas. Reservoirs 18 with non-vertical walls as well as features with protrusions into the viewing area VA can be considered three dimensional shapes.

The reservoir 18 shape and arrangement affects, e.g., the clear aperture not taken up by the reservoirs 18. Higher clear apertures result in a brighter display in the clear state.

In a non-limiting example, the reservoir(s) 18 has/have a predetermined depth that extends through a thickness T of the dielectric layer 16 and provides a volume of free space inside the display element 14 for collecting charged colorant particles 22 (shown in the FIG. 6 series) during one or more stages of an addressing sequence for the display 10. An example of the addressing sequence will be described in further detail below in conjunction with the FIG. 6 series.

In order to maximize the optical contrast between a clear or transparent state (i.e., where the colorant particles are compacted inside the reservoir(s) 18) of the display element 14 and a dark, colored, or opaque state (i.e., where the colorant particles are spread across a viewing area VA) of the display element 14, the total area of the reservoir(s) 18 is also substantially less than a total area of the display element 14. The area of the reservoir(s) 18 generally affects a brightness capability of the display 10, 10′ in the clear state since the compacted colorant particles absorb light therein. In one embodiment, the total area of the reservoir(s) 18 is less than about 50% of the total area of the display element 14. In another embodiment, the total area of the reservoir(s) 18 is less than about 30% of the total area of the display element 14. In still another embodiment, the total area of the reservoir(s) 18 is less than about 20% of the total area of the display element 14. In an even further embodiment, the total area of the reservoir(s) 18 is less than about 10% of the total area of the display element 14. In yet another embodiment, the total area of the reservoir(s) 18 ranges from about 1% to about 10% of the total area of the display element 14.

The display element 14 further includes the electrode 24 adjacent to, and disposed on at least a portion of the substrate 12. In the embodiments shown in the FIG. 2 series, the electrode 24 is operatively disposed inside the reservoir 18. Non-limiting examples of suitable materials for the electrode 24 include a metal (such as, e.g., gold, aluminum, nickel, copper, etc.), a conductive oxide (such as, e.g., indium tin oxide, etc.), a conductive polymer (such as, e.g., PEDOT (poly(3,4-ethylenedioxythiophene), and/or the like), a conductive composite (such as, e.g., a layer of carbon nano-tubes, etc.), and/or combinations thereof.

Referring now to FIGS. 3A and 3B, the display elements 14 _(E), 14 _(F) include a continuous electrode 24′ established on the surface 15 of the substrate 12. In this embodiment, the dielectric layer 16 is established on the electrode 24′ and the reservoir 18 is formed in the dielectric layer 16. In a non-limiting example, the continuous electrode 24′ is continuous through an individual display element 14. In another non-limiting example, the continuous electrode 24′ is also continuous across multiple display elements 14 or the entire display 10, 10′.

Referring again to all of the embodiments of the display element 14 depicted in FIGS. 2A through 2D and in FIG. 3, the display element 14 further includes an electrode 26 distal to the substrate 12 and opposed to the electrode 24, 24′. The electrode 26 will be referred to herein as the “distal electrode”. A space defined between the electrode 24, 24′ and the distal electrode 26 is referred to herein as the viewing area VA. As will be described in further detail below, the colorant particles 22 may be pulled into the viewing area VA, for example, during one or more stages of the addressing sequence depicted in the FIG. 6 series. In some instances, the distal electrode 26 serves as the data line DL (shown in FIGS. 1A and 1B) during, e.g., the write stage of the addressing sequence when an appropriate electric potential is applied thereto. In other instances, the distal electrode 26 may serve as the select line SL or as a common electrode. The distal electrode 26 may also be positioned adjacent to a viewing side VS of the display 10, 10′. It is to be understood that the display 10, 10′ may also have an up-side-down configuration, whereby the distal electrode 26 is positioned opposed to the viewing side VA of the display 10, 10′. In an example, the electrode 26 is formed from an optically transparent, conductive material, non-limiting examples of which include indium tin oxide, poly(3,4-ethylenedioxythiophene), a conductive composite (e.g., a layer of carbon nano-tubes), and/or the like, and/or combinations thereof.

The display element 14 further includes an electrically activatable medium disposed in the viewing area VA (i.e., between the electrode 24, 24′ and the distal electrode 26) and is in fluid communication with the reservoir 18. As used herein, an “electrically activatable medium” refers to a carrier fluid that fills up the entire viewing area VA and the reservoir 18. The electrically activatable medium includes the plurality of colorant particles 22 dispersed therein. In response to a sufficient electric potential or field, the colorant particles 22 move and/or rotate to various spots within the viewing area VA, the reservoir 18, or both in order to produce desired visible images during one or more stages of the addressing sequence. Non-limiting examples of electrically activatable mediums include electrophoretic mediums, electronic inks, anisotropic mediums such as liquid crystals, and/or the like. The electrically activatable medium may be transparent, colored, or dyed.

The colorant particles 22 dispersed in the medium may, in an embodiment, include a single type of particle (such as, e.g., the same color, the same charge, etc.) or, in another embodiment, include two or more types of particles (such as, e.g., two or more different colors, different charges, etc.). As stated above, the colorant particles 22 may, in an example, include a mixture of two different types of colorant particles. In this example, the first type of colorant particles 22 displays a first color, while a second type of colorant particles 22 displays a second color. The mixture of the different types of colorant particles 22 may also be included in a transparent medium, a colored medium, or a dyed medium.

Embodiments of the display element 14 further include a gate electrode 28 having at least a portion thereof operatively disposed between the electrode 24, 24′ and the distal electrode 26. In an example, the gate electrode 28 serves as the electrode placed along the select line SL of the display 10 shown in FIG. 1. The gate electrode 28 is generally used to control the movement of the colorant particles 22 into and out of the reservoir 18. The gate electrode 28 is further used to control an amount of the colorant particles 22 released from the reservoir 18 and moved into the viewing area VA. By controlling the amount of colorant particles 22 released from the reservoir 18 and moved into the viewing area VA, the gate electrode 28 also controls the color perceived by a viewer of the display 10, including a variety of tones in the gray scale.

Different configurations of the gate electrode 28 are depicted in the several embodiments of the display element 14 shown in the FIGS. 2 and 3 series. Very generally, the gate electrode 28 includes at least a portion thereof that is operatively disposed between the electrode 24, 24′ and the distal electrode 26. In one embodiment, the display element (identified by reference numeral 14 _(A) in FIG. 2A) includes two gate electrodes 28 formed on a portion of the dielectric layer 16 adjacent to, and on opposite sides of the reservoir 18. In another embodiment, the display element (identified by reference numeral 14 _(B) in FIG. 2B) includes a single gate electrode 28 formed on a portion of the dielectric layer 16 adjacent to the reservoir 18. In yet another embodiment, the display element (identified by reference numeral 14 _(C) in FIG. 2C) includes two gate electrodes 28′ located adjacent to, and on opposite sides of the reservoir 18, where each electrode 28′ has i) a first portion formed on a portion of the dielectric layer 16 adjacent to the reservoir 18, and ii) a second portion connecting to the first portion and extending through the thickness T of the dielectric layer 16. In still another embodiment, the display element (identified by reference numeral 14 _(D) in FIG. 2D) includes a single gate electrode 28′ including i) a first portion formed on a portion of the dielectric layer 16 adjacent to the reservoir 18, and ii) a second portion connecting to the first portion and extending through the thickness T of the dielectric layer 16.

As shown in the FIG. 3 series, the display element 14 _(E), 14 _(F) includes two gate electrodes 28 disposed on a portion of the dielectric layer 16 adjacent to, and on opposite sides of the reservoir 18. It is to be understood, however, that any of the configurations of the gate electrode 28, 28′ depicted in the FIG. 2 series may also be applied to the embodiments shown in the FIG. 3 series, and vice versa.

Referring now to FIG. 3B, in another embodiment, the display element 14 _(F) may include a passivation layer 21 disposed at least on the gate electrode 28. In an embodiment, the passivation layer 21 is formed from a dielectric material. Non-limiting examples of such materials include photo-activated resins (e.g., SU8), photoresists, dielectric oxides (e.g., SiO₂, HfO₂, etc.), non-conductive polymers, and/or the like, and/or combinations thereof.

It is to be understood that any of the embodiments of the display element 14 depicted in the FIG. 2 series and in FIG. 3 have at least three electrodes; i) the electrode 24, 24′, ii) the distal electrode 26, and iii) the gate electrode(s) 28, 28′, which are arranged in a z-direction with respect to each other. For example, the gate electrode(s) 28, 28′ in each of the embodiments of the display element 14 are located apart from the electrode 24, 24′ in a z-direction, and the electrode 24, 24′ is located apart from the distal electrode 26 in the z-direction. Depending on the orientation of the display 10, in an example, the electrodes, 24, 24′, 26, 28, 28′ may be vertically arranged with respect to each other, however the instant disclosure is not intended to be limited thereto.

It is further to be understood that the electrode 24, 24′, the distal electrode 26, and/or the gate electrode(s) 28, 28′ may be provided as continuous electrodes, segmented electrodes, or pixelated electrodes. Depending, at least in part, on how the display 10, 10′ is addressed, any combination of continuous, segmented and pixelated electrodes may be used in the display element 14 architecture. For example, two of the electrodes may be continuous, while the other electrode is segmented. Such a configuration is advantageously used for electronic skins, interactive surfaces, or the like. For example, segmentation is used for electronic skins or interactive surfaces where segments of the electrode are patterned to be addressed separately from the rest. One of the electrodes can be segmented, and the others can be blanket electrodes for electronic skin applications to control grey levels in the static patterned or segmented images. In another example, the display 10, 10′ may be pixelated by defining rows and columns of electrodes on two layers of the display 10, 10′ architecture in the z-direction, whereby the remaining electrode may be provided as a continuous (or blanket) electrode. Further, row and column electrodes with a blanket or continuous electrode may be used for pixelated display applications. In yet another example, one of the electrodes may be provided as a pixel plate with an active backplane, while the remaining electrodes may be i) a continuous electrode, ii) a segmented electrode, or iii) a pixelated electrode with an active backplane.

Embodiments of the display element 14 further include electrical contacts configured to apply an appropriate electric potential to at least one of the electrode 24, 24′, the distal electrode 26, or the gate electrode 28, 28′ when driving the display 10 to produce a visual image. In an example, the electrical contacts may be situated along a side of the display 10, where the electric potential or field is applied to the electrode 24, 24′, the distal electrode 26, or the gate electrode 28, 28′ from a side of each display element 14. In another example, electrical connection of at least one of the electrodes 24, 24′, 26, 28, 28′ may be accomplished using a backplane. The backplane may, for example, include the electrodes configured to drive the display 10 and suitable hardware configured to drive the electrodes. For example, the gate electrode 28, 28′ along the select lines SL and the electrode 24, 24′ may be considered parts of the backplane. In some instances, the backplane includes additional elements such as power supply lines and the like.

It is to be understood that when a visible image is produced by the display 10, the design of the visible image (including desired colors thereof (which may be achieved via stacking of the display elements 14, described hereinabove)) may be produced by selecting and driving one or more of the display elements 14. Again, selection of which display elements 14 will be driven depends, at least in part, on the addressing scheme employed. As will be described in further detail below, the colorant particles 22 may be driven (in the presence of an appropriate electric potential or field) to produce particular colors at particular intensities to form the colored image. In instances where the display element 14 is configured to produce various tones in the gray scale, the colorant particles 22 may be driven (in the presence of an appropriate electric potential or field) to produce particular intensities to form the image in the gray scale. It is further to be understood that each display element 14 is responsible for producing its own particular color and intensity. In some instances, several of the display elements 14 are selected to produce the same color or the same or different intensities during a write stage of the addressing sequence described below in conjunction with the FIG. 6 series. In other instances, several of the display elements 14 are selected to produce different colors at the same or at different intensities.

It is further to be understood that the display elements 14 may be driven using passive matrix addressing. Upon changing the electric potential of a particular select line SL to an appropriate electric potential, all of the display elements 14 connected to that select line SL (i.e., in the row) are considered “selected” and may be driven during the write stage of the addressing sequence. As used herein, a selected display element 14 may be driven, addressed, or otherwise written by changing the optical state of the display element 14 in accordance with the image to be produced. The driving of the display element 14 is accomplished during a write stage of an addressing scheme, an example of which will be described hereinbelow in conjunction with the FIG. 6 series. The display elements 14 that are not driven are considered to be “unselected” elements. The unselected elements do not change optical states when the selected elements are being driven. The changing or the non-changing of the optical states for selected and unselected display elements 14 will be described in further detail below.

An example of an addressing sequence for driving the display is schematically depicted in FIGS. 6A through 6F. The addressing sequence generally includes a reset stage (shown in FIG. 6A), a write stage (shown in FIGS. 6B through 6E), and a hold stage (shown in FIG. 6F). The description of the addressing sequence that follows is a passive matrix addressing scheme using, e.g., the display 10 depicted in FIG. 1A. Further, the example of the addressing sequence shown in the FIG. 6 series uses the embodiment of the display element 14 _(A) architecture depicted in FIG. 2A, including positively-charged colorant particles 22. It is to be understood that the addressing sequence may also be applied for negatively-charged colorant particles 22, but in reverse. It is also to be understood that any of the display element architectures (e.g., display elements 14 _(A), 14 _(B), 14 _(C), 14 _(D), 14 _(E), and 14 _(F)) described herein may be addressed similarly to the sequence depicted in the FIG. 6 series.

For purposes of describing the addressing scheme depicted in the FIG. 6 series, the electrode 24 is grounded (i.e., set to an electric potential of zero) as a reference point. When the electrode 24 is grounded, the gate electrodes 28 will serve as select lines SL, while the distal electrode 26 will serve as a data line DL.

However, it is to be understood that either the gate electrode 28 or the distal electrode 26 may otherwise be chosen as the reference point. Accordingly, the chosen electrode 24, 28, 26 may be used as a reference point to describe the various stages of the addressing scheme herein. In an alternate embodiment, the display 10 may be driven without a global reference point. In this case, the potentials of each of the electrodes 24, 28, 26 would be changing, instead of the potentials of two of the three electrodes with respect to the third.

Referring now to FIG. 6A, during the reset stage, a suitable electric potential is applied to the electrically activatable medium of the display element 14, driving the colorant particles 22 toward the electrode 24 disposed in the reservoir 18. More specifically, the electrode 26 is set to an electric potential (relative to the grounded electrode 24) sufficient to push the charged colorant particles 22 into the reservoir 18. Also, the gate electrodes 28 are set to an electric potential sufficient to enable the colorant particles 22 to pass through the viewing area VA and into the reservoir 18. In an example, the electric potential of the gate electrodes 28 are set at a value somewhere between the potential of the distal electrode 26 and the potential of the electrode 24.

FIGS. 6B through 6E depict various states of the display element 14 _(A) during a write stage of the addressing scheme. The write stage may include a write state for selected display elements 14 _(A) (shown in FIG. 6B), a write state for unselected display elements 14 _(A) (shown in FIG. 6C), a non-write state for selected display elements 14 _(A) (shown in FIG. 6D), and a non-write state for unselected display elements 14 _(A) (shown in FIG. 6E).

As used herein, the term “non-write” refers to the non-changing of an optical state or appearance of the display element 14 _(A). In a non-limiting example, in instances where the display element 14 _(A) was previously selected to write and thereafter is in a non-write state, the optical state of the display element 14 _(A) established during the writing will remain unchanged during the non-write state. In other words, the term “non-write” is not intended to imply that a display element does not produce a visible image (i.e., is in a clear state); but rather, that the voltage carried is not sufficient to change the pixel.

Referring now to FIG. 6B, during the write state for a selected display element 14 _(A), the distal electrode 26 is set to an electric potential (relative to the electrode 24) sufficient to pull or extract the colorant particles 22 from inside the reservoir 18 into the viewing area VA. Such electric potential of the distal electrode 26 corresponds with a desired gray scale level of the optical image to be displayed by the display element 14 _(A). In the case of positively-charged colorant particles 22, the electric potential of the gate electrodes 28 (i.e., the select line SL) is lowered from a previously “unselected” value to enable the colorant particles 22 to be removed from the reservoir 18 and to move into the viewing area VA.

The amount of the colorant particles 22 pulled from the reservoir 18 depends, at least in part, on the electric potential applied to the medium by the distal electrode 26 (i.e., the data line DL). For example, for positively-charged particles 22, a lower electric potential of the distal electrode 26 enables a larger amount of colorant particles 22 that may be pulled from the reservoir 18. In some instances, the distal electrode 26 may be set to its lowest possible electric potential, which potentially enables substantially all of the colorant particles 22 to be pulled from the reservoir 18. Such a potential of the distal electrode 26 is often referred to as the “write potential” of the data line DL.

During the write state for a selected display element 14 _(A), the optical state of the display element 14 _(A) changes in response to the electric potential applied to the medium. In many cases, the changing of the optical state includes switching the display element 14 _(A) from a clear state to a colored or dark state, and vice versa.

The dark state of the display element 14 _(A) may be accomplished by spreading the colorant particles 22 laterally across the viewing area VA. The spreading of the particles 22 may be accomplished via an in-plane motion thereof, as shown in FIG. 6B. In an embodiment, the in-plane spreading motion of the particles 22 may be accomplished via natural diffusion. For example, the particles 22 in the viewing area VA located just above the reservoir 18 may have a higher concentration of particles 22 than in other areas of the viewing area VA. This higher concentration causes the particles 18 to migrate laterally to regions in the viewing area VA having a lower concentration of particles 22. Such migration may be due, at least in part, to electrostatic repulsive forces created by each individual particle 22, causing the particles 22 to actually repel each other. In another embodiment, the in-plane spreading motion of the particles 22 in the viewing area VA may be accomplished by the electric potential applied to the medium by the electrode 24 and the distal electrode 26. In yet another embodiment, the in-plane spreading motion of the particles 22 in the viewing area VA may be accomplished by the electric potential applied to the medium by the gate electrodes 28 during a hold stage of the addressing sequence (which will be described in detail below in conjunction with FIG. 6F). In some cases, the speed of the spreading motion of the particles 22 across the viewing area VA may also be controlled by the gate electrode potential during the hold stage, the natural diffusion of the particles 22 during the write stage, or combinations thereof.

It is to be understood that the distal electrode 26 (relative to the electrode 24) may otherwise be set to an electric potential capable of pulling a portion of the colorant particles 22 from the reservoir 18 into the viewing area VA, and may be referred to as partial writing of the display element 14 _(A). Such potential is said to be between the “write” potential and the “non-write” potential. The pulling of the portion of the colorant particles 22 (as opposed to substantially all of the colorant particles 22) from the reservoir 18 determines the color depth/tone exhibited by the display 10. The amount of colorant particles 22 pulled from the reservoir 18 may depend, at least in part, on the electric potential applied to the medium from at least one of the distal electrode 26 or the gate electrodes 28. By controlling the magnitude and/or duration of the electric potential applied to the medium, different gray scale levels of the colorant particles 22 may be exhibited and controlled. Any colorant particles 22 not pulled into the viewing area VA remain inside the reservoir 18 proximate to the electrode 24 by virtue of the high unselected potential of the gate electrodes 28. In an example, gray scale control may be accomplished by creating a relatively small potential difference between the gate electrodes 28 and the electrode 24. To reiterate from above, in instances where the electric potential of the distal electrode 26 is set to zero, a repulsive force is exerted on the colorant particles 22, keeping them in the reservoir 18. However, a sufficiently low potential of the distal electrode 26 creates a relatively strong attractive force on the colorant particles, which overcomes the repulsive force created by the gate electrodes 28. By adjusting the distal electrode 26 potential, the magnitude of the overall attractive force may be controlled. In an example, the strength of the retaining repulsive force varies across a lateral dimension of the reservoir 18. As a result, the attractive force from the distal electrode 26 may overcome the retaining force in the center of the reservoir 18, while such force is still smaller near the perimeter of the reservoir 18. The colorant particles in the center of the reservoir 18 will be extracted into the viewing area VA while the colorant particles close to the perimeter of the reservoir 18 will remain in the reservoir 18. The larger the attractive force is exerted by the distal electrode 26, the more colorant particles 22 will be extracted from the reservoir 18. Accordingly, the gray scale level of the display element 14 may be controlled by adjusting the potential of the distal electrode 26.

In instances where the electric potential applied to the medium by the distal electrode 26 is high relative to the electrode 24, then none of the positively-charged colorant particles 22 are pulled from the reservoir 18. In these instances, the display element 14 _(A) remains in an optically clear or transparent state. Such is the case shown in FIG. 6D, where the addressing scheme includes a non-write state for a selected display element 14 _(A).

In an embodiment when the display 10 is driven by a passive addressing method, all but one row are typically unselected, while only one is selected at any given time. In another embodiment, multiple rows may be selected simultaneously. The condition on the unselect voltage enables keeping all the unselected display elements 14 unchanged while the selected elements 14 are being written, regardless of whether the unselected elements 14 are yet to be written or have already been written to.

FIGS. 6C and 6E depict the write and non-write states, respectively, for unselected display elements 14 _(A). Referring now to FIG. 6C, an electric potential is applied to the medium by the distal electrode 26 (the data line DL), where the applied electric potential is such that it would typically extract or pull the colorant particles 22 from inside the reservoir 18 into the viewing area VA if the display elements 14 _(A) is selected (as shown in FIG. 6B and described hereinabove). However, for unselected elements 14 _(A), the electric potential of the gate electrodes 28 is set to be sufficiently high enough to prevent such pulling of the colorant particles 22 into the viewing area VA by the potential applied by the distal electrode 26. In other words, the electric potential applied by the distal electrode 26 is not attractive enough to pull the colorant particles 22 into the viewing area VA. Accordingly, the optical state of the unselected display elements 14 _(A) during the write state remains unchanged.

During the non-write state for unselected display elements 14 _(A) (as shown in FIG. 6E), the distal electrode 26 is set to an electric potential that is insufficient to pull any colorant particles 22 into the viewing area VA. Similar to the state depicted in FIG. 6C, the optical state of the unselected display elements 14 _(A) during the non-write state also remains unchanged.

Referring now to FIG. 6F, during the hold stage, the method of driving the display 10 further includes setting the potential of the gate electrodes 28 to a value sufficient to substantially block the transfer of the colorant particles 22 between the reservoir 18 and the viewing area VA. Such blocking may be accomplished regardless of the electric potential of the distal electrode 26. In an example in which positively-charged colorant particles are used, the potential of the gate electrodes 28 are set so that the potential is i) sufficiently high enough relative to the potential of the electrode 24 to prevent the colorant particles 22 from moving or transferring into the viewing area VA from the reservoir 18, and ii) sufficiently high enough relative to the potential of the distal electrode 26 to prevent any colorant particles 22 in the viewing area VA from moving or transferring into the reservoir 18.

Referring back to the spreading of the colorant particles 22 in the viewing area VA described above, during the hold stage, since the gate electrodes 28 are set to an electric potential that is higher than that of the distal electrode 26, the potential prevents any exchange of colorant particles 22 between the reservoir 18 and the viewing area VA. As a result, a repulsive force is created that also repels the colorant particles 22 away from the gate electrodes 22 toward the bulk of the viewing area VA, causing the particles 22 to spread.

It is to be understood that the addressing sequence described hereinabove in conjunction with the FIG. 6 series may also be used to drive display elements 14 having a mixture of positively-charged and negatively-charged colorant particles 22. In an example, the positively-charged particles and the negatively-charged particles possess different colors (e.g., black as the positively-charged particles and magenta as the negatively-charged particles). The display element 14 may be configured, e.g., so that the black particles collect in one reservoir and the magenta particles collect in another reservoir (such as during a reset stage of the addressing sequence). The collecting of the particles in respective reservoirs may be accomplished using different electrodes (such as electrode 24, 24′) and applying different potentials to the electrodes for the respective particles. Also in this example, during the write stage, the black particles may be pulled into the viewing area via the sequence described hereinabove, while holding the magenta particles in their respective reservoir(s) using their respective gate electrode(s). Thereafter, the magenta particles may be pulled into the viewing area VA also using the sequence described above, while holding the black particles in their respective reservoirs using their respective gate electrode(s).

The addressing sequence described above in conjunction with the FIG. 6 series may also be used to describe an actively driven display (e.g., the display 10′), with a few modifications. For example, the amount of time to write data to a selected row is about the same as the amount of time to charge the active elements in the display 10′ (e.g., the transistor t) rather than the amount of time to move and/or to rotate the colorant particles 22. Furthermore, the write stage may include writing the data to all of the active elements, followed by changing the optical state for all of the display elements 14 substantially in parallel. The reset and the hold stages would remain substantially the same as described hereinabove with respect to passively driven displays.

The present disclosure also includes circuitry suitable for driving the display 10, 10′. It is to be understood that this circuitry (non-limiting examples of which are shown in FIGS. 1A and 1B) may include, but is not limited to software, hardware, firmware, and/or the like, and/or combinations thereof.

Different embodiments of a method of making the display 10 are schematically depicted in the FIGS. 7, 8, 9, 10, and 11 series. The embodiment of the method depicted in the FIG. 7 series is specific for forming the display 10 including the display element 14 _(C), according to the embodiment depicted in FIG. 2C, while the embodiments depicted in the FIGS. 8, 9, 10, and 11 series are specific for forming the display 10 including the display element 14 _(A), according to the embodiment depicted in FIG. 2A. It is to be understood that any of the embodiments of the method of making may be altered as suitably necessary in order to make any of the embodiments of the display elements 14 _(A), 14 _(D), 14 _(C), 14 _(D), 14 _(E), and 14 _(F).

Referring now to the FIG. 7 series, an embodiment of the method of making the display element 14 includes establishing the dielectric layer 16 on a conductive layer C₁, which is established on the underlying substrate 12 (as shown in FIG. 7A). The conducting layer C₁ may be established on the substrate 12 and the dielectric layer 16 may be established on the conductive layer C₁ using any suitable establishing means, non-limiting examples of which include sputtering, evaporation, spin-coating, doctor-blading, gravure coating, slot-die coating, dip-coating, and/or the like, and/or combinations thereof.

A pattern is embossed on the established dielectric layer 16, as shown in FIG. 7B, where at least a portion of the dielectric layer 16 is removed, leaving portions P_(DL. 1). The pattern generally defines portions of the display element 14 architecture that eventually will be formed. Examples of such portions include the reservoir 18 (formed in the method step shown in FIG. 7E), areas for forming the gate electrodes 28 (formed in the method step shown in FIG. 7D), etc.

At least a further portion of the dielectric layer 16 and the conductive layer C₁ are then removed, leaving the pattern shown in FIG. 7C, including removed portion P_(C1). Removal of the various layers may be effected, for example, via an etching process. Etching may be accomplished, for example, by any suitable etching method, including directional dry etching, isotropic wet etching, and/or the like. In some instances, the conducting layer C₁ may also be used as an etch stop for removing portion(s) of the dielectric layer 16 during etching.

Referring now to FIG. 7D, the method of making the display 10 further includes building the conducting layer C₁ upwards from an exposed portion of the conducting layer C₁. The building of the conducting layer C₁ may be accomplished by growing the conducting layer using an electro-plating process.

Thereafter, at least one other portion P_(PD. 2) of the dielectric layer 16 is removed, thereby exposing a portion P_(CM. 1), of the first layer of conductor material C₁ (as shown in FIG. 7E). The removing of the at least one other portion of the dielectric layer 16 may be accomplished via an etching process. The removing of the at least one other portion P_(DL. 2) forms the reservoir 18 (as shown in FIG. 7E). For forming the embodiments of the display element 14 depicted in the FIG. 2 series, a second layer of conductor material C₂ is then established on the exposed portion of the first layer of conductor material C₁ (as shown in FIG. 7F). The establishing may be accomplished, for example, via electro-plating. The second layer of conductor material C₂ forms at least one of i) the electrode 24 disposed inside the reservoir 18, or ii) at least an other portion of the gate electrode 28. It is to be understood however, that embodiments similar to the display element 14 shown in the FIG. 2 series that includes a continuous electrode (such as the electrode 24′ shown in the FIG. 3 series), the second layer of conductor material C₂ may be used to form at least an other portion of the gate electrode 28; and not an electrode disposed inside the reservoir 18.

The embodiment of the method of making the display 10 described above in conjunction with the FIG. 7 series may be used to form any of the embodiments of the display element 14 described above in connection with the FIGS. 2 and 3 series, as well as other similar configurations not explicitly shown in the drawings. Adjustments to the method may be made in order to accommodate various changes in the display element 14 architecture. For example, if the display element includes a single gate electrode (such as for the embodiment of the display element 14 _(B) depicted in FIG. 2B), the pattern embossed on the dielectric layer 16 may be adjusted so that desired portion(s) of the dielectric layer 16 are removed during the removal step shown in FIG. 7C in order to form the single gate electrode (and not two gate electrodes).

Other embodiments of making the display 10 are schematically shown in the FIGS. 8, 9, 10, and 11 series. According to these embodiments, the method of making the display 10 is substantially simplified by removing at least one patterning step, and reducing the number of material removal steps. For example, this may be accomplished by using a substrate 12 material having one or more pre-deposited layers of material thereon. Such a process is generally depicted in the FIGS. 8 and 9 series, and the pre-deposited material layer will be identified herein by reference identifier L.

Referring now to the embodiment of making the display 10 depicted in the FIG. 8 series, the method includes establishing a material stack S on the substrate 12 (as shown in FIG. 8A), where the substrate 12 includes a pre-deposited layer of conductor material L_(con). The material stack S includes an embossing resin R established on another layer of conductor material C₁, which is established on a layer of dielectric material 16. In a non-limiting example, the thickness of the conductor layer C₁ ranges from about 20 nm to about 5 μm, the thickness of the conductor material layer L_(con) ranges from about 20 nm to about 5 μm, the thickness of the dielectric layer 16 ranges from about 1 μm to about 100 μm, and the thickness of the resin layer R ranges from about 1 μm to about 100 μm.

As shown in FIG. 8B, a pattern is embossed on the dielectric layer 16 of the resin R of the material stack S, the pattern generally defining portions of the display element 14 architecture that eventually will be formed (e.g., the reservoir 18, the gate electrodes 28, etc.). The resin R is cleaned via, e.g., timed etching of the resin layer R. After cleaning, at least a portion of the material stack S (including the resin layer R, the conductor layer C₁, and the dielectric layer 16) is removed (via one or more intermediate steps), thereby defining a gap G in the stack S. The gap G exposes a portion P_(L1) of the conductor layer L_(CON). The removing may be accomplished via an etching process (e.g., ITO etching, spacer etching, and/or combinations thereof) and/or via any other suitable removal means and/or process(es).

As shown in FIG. 8C, another conductor layer C₂ is established in the gap G, where the conductor layer C₂ forms the electrode 24. Establishing may be accomplished, e.g., by electroplating the conductor layer C₂ to the thinner conductor layer L_(CON). In an example, the electroplating may be accomplished so that the established conductor layer C₂ is formed to a target thickness. In a non-limiting example, the target thickness of conductor layer C₂ ranges from about 20 nm to about 20 microns. Non-limiting examples of suitable conductor layers C₂ include nickel, copper, gold, palladium, and/or the like, and/or combinations thereof.

After establishing the conductor layer C₂ in the gap G, the method further includes removing a portion of the material stack S surrounding the newly established conductor layer C₂ (as shown in FIG. 8D). The removal of the portion of the material stack S forms the reservoir 18 and exposes portions P_(L2) of the underlying thinner conductor L_(CON). The exposed portions of the original layer L_(con) can be removed by etching, thereby isolating C₂ electrically from the rest of L_(con). Thereafter, the resin layer R, and a portion of the conductor layer C₂ is removed, thereby forming the gate electrode 28 from the remaining portion of the conductor layer C₁. Removal of the resin layer R and the portion of the conductor layer C₁ may be accomplished via an isotropic etching process. The resultant structure of the display element 14′ is shown in FIG. 8E.

Yet another embodiment of the method of making the display 10 is depicted in the FIG. 9 series. In this embodiment, the substrate 12 is substantially uniformly pre-coated with a layer of electroless catalyst material L_(CAT) (as shown in FIG. 9A). In an embodiment, the catalyst layer L_(CAT) is a discontinuous layer and includes a plurality of small islands defined therein. The size of the small islands is substantially smaller than a target width of the electrode 24 to eventually be formed. The islands may be formed at the time of depositing the layer L_(CAT) on the substrate 12, or via a treatment process after the depositing of the layer L_(CAT) on the substrate 12. Non-limiting examples of suitable catalyst materials for the layer L_(CAT) includes gold, palladium, and compounds thereof. Furthermore, the catalyst layer L_(CAT) is a thin layer, whereby the layer L_(CAT) may be considered substantially transparent. In an embodiment, the thickness of the layer L_(CAT) may range between about 0.1 nm and about 50 nm.

As also shown in FIG. 9A, a material stack S is established on the substrate 12 coated with the catalyst layer L_(CAT). The material stack S includes an embossing resin R established on a layer of conductor material C₁, which is established on a layer of dielectric material 16.

As shown in FIG. 9B, a pattern is embossed on the dielectric layer 16 of the resin R of the material stack S, the pattern generally defining portions of the display element 14 architecture that eventually will be formed (e.g., the reservoir 18, the gate electrodes 28, etc.). After cleaning, at least a portion of the material stack S (including the resin layer R, the other conductor layer C₁, and the dielectric layer 16) is removed, thereby defining a gap G in the stack S, as shown in FIG. 9C. The gap G eventually forms the reservoir 18. Removing may be accomplished via etching (e.g., ITO etching, spacer etching, and/or combinations thereof) and/or via any other suitable removal means and/or process(es).

As shown in FIG. 9D, another conductor layer C₂ is established in the gap G, where the conductor layer C₂ forms the electrode 24. Establishing may be accomplished, e.g., by electroplating the conductor layer C₂ to catalyst layer L_(CAT). In an example, the electroplating may be accomplished so that the established conductor layer C₂ is formed to a target thickness, for example similar to the target thickness of layer C₂ in the FIG. 8 series.

After establishing the conductor layer C₂ in the gap G, the resin layer R, and a portion of the conductor layer C_(L) is removed, thereby forming the gate electrode 28 from the remaining portion of the conductor layer C₁, as shown in FIG. 9E. Removal of the resin layer R and the portion of the conductor layer C₁ may be accomplished via an isotropic etching process. The resultant structure of the display element 14″ is shown in FIG. 9E.

It is to be understood that, if desired, a passivation layer 21 may be included between resin R and conductor layer C₁ in FIG. 9A. The passivation layer 21 would then remain until its removal (via, e.g., etching) between FIGS. 9D and 9E.

Yet another embodiment of the method of making the display 10 is depicted in the FIG. 10 series. In this embodiment, a material stack S is established on an uncoated substrate 12 (as shown in FIG. 10A). The material stack S includes an embossing resin layer R, a conductor layer C₁, and a dielectric layer 16.

As shown in FIG. 10B, a pattern is embossed on the dielectric layer 16 of the resin R of the material stack S, the pattern generally defining portions of the display element 14 architecture that eventually will be formed (e.g., the reservoir 18, the gate electrodes 28, etc.). After cleaning, at least a portion of the material stack S (including the resin layer R, the conductor layer C₁, and the dielectric layer 16), and a portion of the substrate 12 are removed, thereby defining a gap G in the stack S and into the substrate 12. The gap G eventually forms the reservoir 18. Removing may be accomplished via etching (e.g., ITO etching, spacer etching, and/or combinations thereof) and/or via any other suitable removal means and/or process(es).

As shown in FIG. 10C, another layer is L established over the material stack S and into the gap G. In an example, the layer L is another conductor layer. In another example, the layer L is a catalyst material layer. The establishing of the layer L may be accomplished via a directional deposition method such as, e.g., sputtering. In an example, portions P_(L3) of the layer L established on the resin layer R and the exposed substrate 12 are thicker than portions P_(L4) of the layer L established on the side of the material stack S inside the gap G. In order to break electrical connection between the portions P_(L4) of the layer L established on the resin R and the portion P_(L4) of the layer L established in the gap, the thinner portions P_(L3) of the layer L established on the side of the material stack S are removed via, e.g., an etching or other suitable removal process (as shown in FIG. 10D).

In instances where the layer L is a conductor material layer, the portion P₁₄ of the layer L established inside the gap G is electroplated with more of the same conductor material (non-limiting examples of which include nickel, copper, gold, palladium, and/or the like, and/or combinations thereof) to a target thickness ranging between about 20 nm and about 20 microns, thereby forming the electrode 24 (as shown in FIG. 10E). In instances where the layer L is a catalyst material layer, the method further includes establishing a layer of conductor material over the layer L (not shown in the figures). The catalyst material layer is then plated with a conductor material to a target thickness to form the electrode 24.

After forming the electrode 24, the method further includes removing the portion P_(L3) of the layer L established on the resin layer R, as well as a portion of the material stack S (as shown in FIG. 10F). Thereafter, the resin layer R and a portion of the conductor layer C₁ are removed, thereby forming the gate electrode 28 from the remaining portion of the conductor layer C₁. Removal of the resin layer R and the portion of the conductor layer C₁ may be accomplished via an isotropic etching process. The resultant structure of the display element 14′″ is shown in FIG. 10F.

Referring now to the embodiment of making the display 10 (which embodiment includes a continuous electrode 24 and passivation on the gate electrode 28) depicted in the FIG. 11 series, the method includes establishing a material stack S on the substrate 12 (as shown in FIG. 11A), where the substrate 12 includes a pre-deposited layer of conductor material L_(con). The material stack S includes an embossing resin R established on a passivation layer 21, which itself is established on another layer of conductor material C₁, which itself is established on a layer of dielectric material 16. In a non-limiting example, the thickness of the conductor layer C₁ ranges from about 20 nm to about 5 μm, the thickness of the conductor material layer L_(con) ranges from about 20 nm to about 5 μm, the thickness of the dielectric layer 16 ranges from about 1 μm to about 100 μm, the thickness of the passivation layer 21 ranges from about 10 nm to about 10 μm, and the thickness of the resin layer R ranges from about 1 μm to about 100 μm.

As shown in FIG. 11B, a pattern is embossed in the resin R of the material stack S, the pattern generally defining portions of the display element 14 architecture that eventually will be formed (e.g., the reservoir 18, the gate electrodes 28, etc.). The resin R is cleaned via, e.g., timed etching of the resin layer R. After cleaning, at least a portion of the material stack S (including the resin layer R, the passivation layer 21, the conductor layer C₁, and the dielectric layer 16) is removed (via one or more intermediate steps), thereby defining a gap in the stack S, as shown in FIG. 11C. The gap G exposes a portion of the conductor layer L_(CON), which becomes a continuous electrode 24. The removing may be accomplished via an etching process (e.g., ITO etching, spacer etching, and/or combinations thereof) and/or via any other suitable removal means and/or process(es).

As shown in FIG. 11D, the method further includes removing a portion of the resin layer R. The removal of the portion of the resin layer R exposes portions of the underlying passivation layer 21. As shown in FIG. 11E, if desired, a further portion of the resin layer R, and a portion of the passivation layer 21 may be removed, thereby exposing portions of the underlying conductor layer C₁. Finally, as shown in FIG. 11F, if desired, the remaining resin layer R and portions of the conductor layer C₁ may be removed, thereby forming the gate electrode(s) 28 from the remaining portion of the conductor layer C₁, the gate electrodes 28 having a passivation layer 21 thereon. Removal of the resin layer R and the portion of the conductor layer C₁ may be accomplished via, e.g., an isotropic etching process. The resultant structure of the display element 14′″ is shown in FIG. 11F.

While several embodiments have been described in detail, it will be apparent to those skilled in the art that the disclosed embodiments may be modified. Therefore, the foregoing description is to be considered exemplary rather than limiting. 

1. A display (10, 10′), comprising: at least one display element (14, 14 _(A), 14 _(B), 14 _(C), 14 _(D), 14 _(E), 14 _(F), 14′, 14″, 14′″, 14″″), comprising: a substrate (12, 13); an electrode (24, 24′) adjacent to, and disposed on at least a portion of the substrate (12, 13), and an other electrode (26) distal to the substrate (12, 13) and opposed to the electrode (24, 24′); a dielectric layer (16) established on one of i) the substrate (12, 13), or ii) at least one of the electrode (24, 24′) or the distal electrode (26); an electrically activatable medium disposed between the electrode (24, 24′) and the distal electrode (26), the medium including a plurality of colorant particles (22); at least one reservoir (18) defined in the dielectric layer (16); and a gate electrode (28, 28′) having at least a portion thereof operatively disposed between the electrode (24, 24′) and the distal electrode (26); wherein the at least one display element (14, 14 _(A), 14 _(B), 14 _(C), 14 _(D), 14 _(E), 14 _(F), 14′, 14″, 14′″, 14″″) is configured to form a visible image by in-plane motion of the plurality of colorant particles (22) when a sufficient electric potential is applied to at least one of the electrode (24, 24′), the distal electrode (26), or the gate electrode (28, 28′); and wherein an area of the at least one reservoir (18) is substantially less than an area of the at least one display element (14, 14 _(A), 14 _(B), 14 _(C), 14 _(D), 14 _(E), 14 _(F), 14′, 14″, 14′″, 14″).
 2. The display as defined in claim 1 wherein at least one of the electrode (24, 24′), the distal electrode (26), or the gate electrode (28, 28′) is a continuous electrode, a segmented electrode, a pixelated electrode, or combinations thereof.
 3. The display as defined in any of claims 1 or 2 wherein the dielectric layer (16) is established on the substrate (12, 13), and wherein the electrode (24, 24′) is operatively disposed in the at least one reservoir (18).
 4. The display as defined in any of the preceding claims wherein the electrode (24, 24′) is established on the substrate (12, 13), and wherein the dielectric layer (16) is established on the electrode (24, 24′).
 5. The display as defined in any of the preceding claims wherein the plurality of colorant particles (22) includes particles i) of the same type; or ii) of different types, and wherein the display (10, 10′) further comprises an other gate electrode (28, 28′) opposed to the gate electrode (28, 28′), wherein the other gate electrode (28, 28′) has at least one portion thereof operatively disposed between the electrode (24, 24′) and the distal electrode (26).
 6. The display as defined in any of the preceding claims wherein there is at least a second reservoir (18) defined in the dielectric layer (16), and wherein the plurality of colorant particles (22) includes particles having at least two different colors, one of the at least two different colors collecting in the at least one reservoir (18), and the other of the at least two different colors collecting in the second reservoir (18).
 7. The display as defined in any of the preceding claims wherein the at least one reservoir (18) has a predetermined depth and wherein the at least one reservoir (18) is a plurality of reservoirs forming a periodic lattice arrangement or an aperiodic stochastic arrangement, the plurality of reservoirs (18) including at least one of dot structures, line structures, two-dimensional areas, three-dimensional shapes, or fractal shapes.
 8. The display as defined in any of the preceding claims, further comprising a passivation layer (21) established on the gate electrode (28, 28′).
 9. The display as defined in any of the preceding claims wherein the display (10, 10′) is configured to be driven via direct addressing, passive matrix addressing, or active matrix addressing.
 10. The display as defined in any of the preceding claims wherein the at least one display element (14, 14 _(A), 14 _(B), 14 _(C), 14 _(D), 14 _(E), 14 _(F), 14′, 14″, 14′″, 14″″) is further configured to exhibit a gray scale by controlling the electric potential applied to the electrode (24, 24′), the distal electrode (26), the gate electrode (28, 28′), or combinations thereof.
 11. The display as defined in any of the preceding claims wherein the area of the at least one reservoir (18) is less than or equal to about half of the area of the at least one display element (14, 14 _(A), 14 _(B), 14 _(C), 14 _(D), 14 _(E), 14 _(F), 14′, 14″, 14′″, 14″″).
 12. The display as defined in any of the preceding claims wherein the at least one display element (14, 14 _(A), 14 _(B), 14 _(C), 14 _(D), 14 _(E), 14 _(F), 14′, 14″, 14′″, 14″″) is configured to be selected or unselected when driving the display (10, 10′) by controlling the electric potential applied between the electrode (24, 24′) and the gate electrode (28, 28′).
 13. Circuitry for driving the display (10, 10′) of any of the preceding claims, the circuitry configured to perform the following steps: during a reset stage, applying a first electric potential to the electrically activatable medium, driving the plurality of colorant particles (22) toward the electrode (24, 24′); during a write stage, applying a second electric potential to the electrically activatable medium i) to pull at least a portion of the plurality of colorant particles (22) from the electrode (24, 24′), while an other portion of the plurality of colorant particle (22) is located proximate the electrode (24, 24′), and ii) to introduce the portion of the plurality of colorant particles (22) into a viewing area (VA); and during a hold stage, applying a third electric potential to the electrically activatable medium to i) hold the other portion of the plurality of the colorant particles (22) proximate the electrode (24, 24′), and ii) spread the portion of the plurality of the colorant particles (22), introduced into the viewing area (VA), across at least a portion of the viewing area (VA).
 14. The circuitry as defined in claim 13, further configured to, during the write stage, control a gray scale of color viewable by the portion of the plurality of colorant particles (22) by adjusting at least one of the first, second, or third electric potentials applied between the gate electrode (28, 28′) and at least one of the electrode (24, 24′) or the distal electrode (26).
 15. A method of making a display (10, 10′), comprising: establishing a material stack (S) on a substrate (12, 13), the material stack (S) including at least a dielectric layer (16), a first conductor layer (C₁), and a resin (R); embossing a pattern on the resin (R); removing at least a portion of the material stack (S), thereby defining a gap (G) in the material stack (S); establishing a second conductor layer (C₂) in the gap (G), the second conductor layer (C₂) forming an electrode (24, 24′) proximate to the substrate (12, 13); and removing the resin (R) and a portion of the first conductor layer (C₁), thereby forming a gate electrode (28, 28′) from a remaining portion of the first conductor layer (C₁).
 16. A method of making a display (10, 10′), comprising: establishing a material stack (S) on a continuous electrode layer (L_(CON)) disposed on a substrate (12, 13), the material stack (S) including at least a dielectric layer (16), a conductor layer (C₁) and a resin (R); embossing a pattern on the resin (R); removing at least a portion of the material stack (S), thereby defining a gap (G) in the material stack (S) to expose at least a portion of the continuous electrode layer (L_(CON)); and removing the resin (R), thereby forming a gate electrode (28, 28′) from a remaining portion of the conductor layer (C₁). 